A Block Assembly Tool for Design Automation of FPGA Implementations
Ke Du, Stéphane Domas, Michel Lenczner · 2022
Since the appearance of hardware, there has always been a serious shortage of skilled designers, especially with the emergence of FPGAs that resulted in a fast rising of project sizes. Therefore, it needs to investigate easier solutions for hardware programming. This paper presents the details of an EDA tool called BlAsT (Block Assembly Tool) that allows non-expert users to generate VHDL code automatically, compliant with real target architecture and not only for simulations. Moreover, it allows to check whether the result is correct for given input streams and give necessary modifications to ensure the correctness. This process involves pattern checking and graph modification algorithms for FPGA design automation. As shown in the example case, BlAsT performs well for design automation for FPGA architectures.