Design and Implementation of A Cache Adapted to the LoongArch Architecturert
Lin Chen, Xiao Ma, Xiang Ji, Ziyan Wang · 2022
A cache adapted to the LoongArch architecture is designed and implemented using the FPAG platform. A simple and performance balanced Cache module is designed and implemented. The design of the read and write data paths of the Cache module is given, and a state machine is designed and implemented for the logical control of the Cache module. The interaction interface between the Cache and the CPU is designed. The CPU pipeline adaptation method for Cache in hit and unhit cases is given. The processing flow of UnCache access is given. Cache-related instructions in the LoongArch instruction set are implemented. The test results show that the scheme meets the design requirements. Cache is simple and effective, and is suitable as a case study for initial understanding of Cache functionality and structure.