Baseline-auxiliary Network Architecture Design Scheme to Compensate for Binarization Residual Errors
Siming Fu, Tian Ni, Haoji Roland Hu · 2022
While network binarization is a promising method in memory saving and speedup on hardware, it inevitably leads to binarization residual errors of intermediate features, resulting in performance capability degradation. To alleviate the above issue, we focus on the network architecture to design the more suitable network structure for the extreme-low bit scenario. In this paper, we propose the baseline-auxiliary network design method to compensate for the binarization residual of features via searching for auxiliary branches guided by feature similarity confidence score. The intermediate feature maps are reasonably enhanced by combining baseline and auxiliary features, mimicking the corresponding features of the full-precision network. In addition, we devised a novel diversity loss for the retraining process, which plays an important role in reducing information redundancy and expanding the diversity between auxiliary branches and binary networks. Extensive experiments show that our approach is superior in terms of accuracy and computational performance, and is plug-and-play for different network backbones and binarization policies.