FRA-FPGA: Fast Reconfigurable Automata Processing on FPGAs
Peng Zhang, Shijun Zhang, Shang Li, Jin Zhang, Shaoxun Liu, Youjun Bu · 2022
Accelerating regular expression (regex) matching, or equivalently finite automata processing, using FPGAs is widely adopted by many demanding regex-based applications to improve throughput and power efficiency. However, offloading a large regex rule set entirely into an FPGA is expensive, if not unaffordable, due to the limited on-chip resources. In this paper, we propose FRA-FPGA (Fast Reconfigurable Automata on FPGAs), a homogeneous NFA architecture on FPGAs which can be reconfigured within 1μs. Meanwhile, the reconfiguration time of FRA-FPGA is independent of the number of regex rules it accommodates. Because FRA-FPGA can be reloaded quickly, it is feasible to offload the small subset of activated regex rules into FRA-FPGA dynamically, as opposed to compiling the whole regex rule set into FPGA beforehand. We implemented FRA-FPGA on the Xilinx U200 card to accelerate Hyperscan. Our experimental results show that the FRA-FPGA can improve Hyperscan's throughput by about 15 times (stream mode) and 33 times (block mode), respectively, while consuming only 4.23% logic resources and 16.64% memory resources of the FPGA(VU9P).