Accelerators for Sparse Matrix-Matrix Multiplication: A Review
G Noble, S. Nalesh, S Kala · 2022 IEEE 19th India Council International Conference (INDICON) · 2022
The rising popularity of deep learning algorithms demands special accelerators for matrix-matrix multiplication. Most of the matrix multipliers are designed based on the systolic array architectures and are not suitable for sparse operations. Compared to the dense equivalent, sparse operations are complex and require additional circuitry for implementation. The irregular memory access pattern limits the performance of sparse operations. This paper reviews latest state-of-the-art sparse matrix-matrix multipliers and compares their performance.