LFSR and Counter based Watermarking of FSM
Ankur Bhardwaj · 2022 8th International Conference on Signal Processing and Communication (ICSC) · 2022
Watermarking has emerged as a very powerful technique for Intellectual Property(IP) Protection of semiconductor IP cores. Some hidden functionality or code is added to a digital design which in turn can only be detected by providing a signature input. This method can be used to avoid the unauthorized use of an IP. In sequential circuits, watermarking can be achieved in many ways. One of them is Finite State Machine(FSM) based watermarking. Many techniques are available in literature for watermarking of FSM. Each technique has some advantages and some limitations. Major challenge in creating a robust and efficient watermarking technique is to make the embedded watermark invisible, hard to remove and low hardware overhead. In this paper a watermarking technique is proposed which uses a linear feedback shift register(LFSR) and a counter to create a watermark. An attacker cannot easily detect the presence of watermark in the proposed technique and it is also not possible to remove the watermark. The simulation of the watermarked design is done using Modelsim and synthesis is carried out in Xilinx ISE. The synthesis results are compared with the existing watermarking techniques.