Optimal Read Voltages of Retention-after-Cycling in Triple-level-cell (TLC) 3D NAND Flash Memory and its High-precision Modeling Method
Hongzhe Lin, Yifan Guo, Yifang Xi, Yachen Kong, Xuepeng Zhan, Jiezhi Chen · 2022
To suppress the error bits of retention-after cycling in 3D NAND flash memory, threshold voltage (Vth) distributions of various program states as well as optimal read voltages are characterized in triple-level-cell (TLC) 3D NAND flash memory. Different from the traditional read-retry strategy by searching for the best read voltages, a simple mathematical model is proposed in this work, aiming at predictions of the optimal read voltage shift (ORVS) with low read latency. The model has been evaluated in various cycling and retention scenarios, showing high prediction precisions. Specially, for blocks with 8k P/E cycles, the prediction accuracy is as high as 96.6% after long-time (335hr@55${}^{\circ}\mathrm{C})$retention.