A Novel Dual Logic Locking Method to Prevent Counterfeit IP/IC
Aobo Cui, Dongrong Zhang, Qiang Ren, Donglin Su · 2022
With the popularization of horizontal business model in the semiconductor design and manufacturing industry, IC piracy frequently occurs in the supply chain by overpro-ducing and transporting unqualified/defective devices, reverse engineering, etc. This paper proposes a dual logic locking (DLL) method to prevent counterfeit IP/IC. Based on this method, the foundry/assembly can perform tests in the state of IP/IC output obfuscated and obtain test results. Then, the designer decides whether to permanently activate the IP/IC based on the encrypted test results. The proposed method only needs one data exchange between the designer and foundry/assembly compared with the secure split test method. The proposed DLL was implemented on several benchmarks, and the experimental result shows that it has a low overhead. In addition, the security analysis shows that it is robust against IP/IC piracies.