LT-PIM: An LUT-Based Processing-in-DRAM Architecture With RowHammer Self-Tracking
Ranyang Zhou, Sepehr Tabrizchi, Arman Roohi, Shaahin Angizi · IEEE Computer Architecture Letters · 2022
Herein, we propose LT-PIM as a${\ul{L}}$ookup${\ul{T}}$able-based${\ul{P}}$rocessing-${\ul{I}}$n-${\ul{M}}$emory architecture leveraging the high density of DRAM to enable massively parallel and flexible computation. LT-PIM supports lookup table queries to execute complex arithmetic operations, such as multiplication via only memory read operation. In addition, LT-PIM enables bulk bit-wise in-memory logic by elevating the analog operation of the DRAM sub-array to implement Boolean functions between operands in the same bit-line. With this, LT-PIM enables a complete and inexpensive in-DRAM RowHammer (RH) self-tracking approach. Our results demonstrate that LT-PIM achieves$\sim$70% higher energy efficiency than the fastest charge-sharing-based designs and$\sim$32% over the best LUT-based designs. As for the RH self-tracking, with a worst-case slowdown of$\sim$0.2%, LT-PIM archives up to$\sim$80% energy-saving over the best designs.