Quantum Annealing Error Mitigation Using Mirror Symmetries on Different Generations of Quantum Annealers
Bhavika Bhalgamiya, Dilina Perera, M. A. Novotny · 2022 IEEE International Conference on Quantum Computing and Engineering (QCE) · 2022
We present an effective method of error mitigation on adiabatic quantum annealing machines. This method involves a mirror symmetric property of the adiabatic quantum device underlying graph. The methodology is tested on different generations of D-Wave annealing devices. An initial Hamiltonian is formed with two mirror- symmetric graphs k = k′, coupled with either ferromagnetic (M > 0) or antiferromagnetic (M < 0) graph edges, and then implemented on the underlying D-Wave Chimera graph. Examining the returned solution states at the end of annealing process, allows one to discard returned states that are not the ground state of the problem Hamiltonian. The approach is applicable to any quantum adiabatic device. We used the method to compare the performances of different generations of adiabatic devices.