A High-Logic-Density, Low-Power Control Character Detection and Identification Circuit for the JESD204B Data Link Layer
Qiushi Wang, Peng Yin, Nairiga Wu, Amine Bermak, Fang Tang · IEEE Transactions on Circuits & Systems II Express Briefs · 2022
In this brief a design methodology is proposed for the control character detection and identification (CCDI) in JESD204B data link layer. The longest common sequence (LCS) is extracted as the basis in the pre-detection step, and the remaining characteristic sequence is used in the second detection step. The verification results illustrate that the proposed optimization design can achieve high logic density and low power consumption. The reduction of the hardware resources and power consumption is about 37.5% and 17%–20% respectively as compared with the traditional scheme.