On the SCA Resistance of Crypto IP Cores
Zoya Dyka, Ievgen Kabin, Marcin Brzozowski, Goran Panić, Cristiano Calligaro, Milos D. Krstic, Peter Langendöerfer · 2022
With the growth of system complexity, the use of previously designed components, IP cores, has become a usual practice in hardware design. Nowadays, many companies offer a broad range of IP solutions available for use in ASICs as well as FPGA designs. In this paper we concentrate on the use of soft crypto IP cores, i.e. the cores designed to address security issues. The intention is to raise the awareness of the designers about the possible vulnerabilities that may be acquired with such pre-designed IP blocks if no additional security evaluation was performed. We show on the example of an internally-developed cryptographic core, how the security strength of the design depends on the applied semiconductor manufacturing process and the logic gate libraries.