Assessing Rules in Memory Controllers with Hardware Simulator Executing Real Programs
Marco Stefani, Felipe G. A. e Silva, Cesar Augusto Missio Marcon, Jarbas Silveira · 2022
Electronic memories are subject to failure due to magnetic fields and radiation, causing temporary faults that can be mitigated by error correction codes. Evaluating the efficacy of these mechanisms in hardware can make the design more expensive, take a long prototyping time, and even lose time to market. Hardware simulators or emulators are often generic, requiring specific and specialized development to evaluate memory controllers. This work proposes Absimth to assess the computational system behavior in the presence of memory errors. Absimth is a hardware simulator focusing on memory controller data flow, allowing the creation and configuration of custom modules. The simulator aims to optimize the design of next-generation memory controller architectures, meeting fault tolerance requirements with fast validation before the hardware implementation phases.