Visualization Tool of Microprocessor Instruction for Designing New Architecture with Meta-Instructions
Tomoyuki Morimoto, Shunsuke Onogi, Tadahiro Ogita, Ryota Kawamata, Ziming Wang, Toshiyuki Tsutsumi · 2022
When making a new microprocessor (MPU), the instruction set architecture is considered. It is also necessary to design how to work the instructions in hardware circuits of the MPU. As a solution to these, we previously proposed a method of expressing the instruction in two ways of semantic expression and functional expression. We also developed a tool that can visualize the instruction. In this paper, we have improved this method by extending a usual MPU to a meta-instruction for any MPU. We have also developed a conversion method for the meta-instruction using a relationship between the semantic and the functional expressions. Then we verified how well our meta-instruction can represent the usual instructions. It is confirmed that most of them can be represented by the meta-instruction. Since our developed tool user can design the meta-instructions from either semantic or functional expression and both expressions can be automatically converted to each other, they can design the instruction of a new MPU and can understand hardware circuits for the MPU instruction by the functional expression.