A 183F2 Gate Leakage-Based Physically Unclonable Function With Area Efficient Current Tilting-Based Masking Scheme
Beomsoo Park, Nima Maghari · ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) · 2022
This paper presents a gate leakage-based physically unclonable function (PUF) with an area efficient current tilting-based masking scheme to enhance the overall bit error rate (BER). The implemented masking scheme only requires checking the validity of the PUF at the nominal condition and is embedded within the readout circuit enabling to minimize the overall area. Designed with a 65nm process, the unit PUF size and core energy are 183F2and 0.014fJ/bit as it leverages gate leakage current. The total area per a unit PUF cell considering all the peripheral circuits is 927F2. Experimental results show that the prototype PUF achieves a native instability and BER of 6.89% and O.77%, respectively, at nominal condition of 1.2V and 27°C. The BER is improved to 0% at nominal condition with even a small tilt that masks 17.3% of the PUF bits. A masking ratio of 41.8% allows to maintain the BER of 0% across supply voltage and temperature range of 0.9V~l.5V and 0~100°C, respectively.