Functional Testing of On-chip Analog/RF Circuits using Machine Learning based Regression Models
Anshaj Shrivastava, Gaurab Banerjee · 2022
This study aims to utilize the simulation data col-lected during the design stages of analog and RF Integrated Circuits (ICs), to enable faster functional testing during post-silicon validation. The above approach is demonstrated for an on-chip LC-Voltage Controlled Oscillator (LC-VCO) circuit, which was fabricated in a commercially available 180nm RF CMOS process, as a part of a radar-on-chip system. The key idea is to build a Machine Learning based Regression Model (MLRM) that learns various correlations between a few internal DC-node voltages (or currents) and performance-metrics of the LC-VCO circuit, using block-level simulation data. During post-silicon IC-testing, this MLRM is then used to predict the tuning-curve of the LC-VCO by measuring the same DC-node data. Finally, preliminary silicon-based measurement results show that the proposed approach holds much promise as the difference between the predicted tuning curves and measured curves is within 5%.