The LANSCE FPGA Embedded Signal Processing Framework
Jeffrey Owen Hill · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 2024
During our replacement of some LANSCE LINAC instrumentation systems we have developed a common architecture for timing system synchronized embedded signal processing systems.Our design follows trends of increasing levels of electronics system integration; a single commercial-off-the-shelf (COTS) board assumes the roles of analogue-to-digital conversion and advanced signal processing while also providing the LAN attached EPICS IOC functionality.These systems are based on agile FPGA-based COTS VITA VPX boards integrating a VITA-57 FMC mezzanine site.Our signal processing is primarily developed at a high level specifying numeric algorithms in software source code to be integrated together with COTS signal processing intellectual property components for synthesis of hardware implementations.We will discuss our requirements, our decision point selecting the VPX together with the FMC industry standards, the benefits along with costs of system integrating multi-vendor COTS components, the design of some our signal processing algorithms, and the benefits along with costs of embedding the EPICS IOC within an FPGA.