An ILP Task Mapping for MIMD Processor with Vector Accelerator in Model-Based Development
Shanwen Wu, Satoshi Kumano, Kei Marume, Masato Edahiro · 2022 International Conference on Electrical, Computer and Energy Technologies (ICECET) · 2022
This paper presents a parallelization workflow in model-based development for a MIMD (Multiple Instruction streams, Multiple Data streams) processor with a vector accelerator. In the workflow, an Integer Linear Programming (ILP) formulation is proposed to deploy tasks extracted from the Simulink model. The proposed formulation can determine the number of processors that a task needs, and whether vectorization should be used to accelerate a task to reduce synchronization overhead and execution time. In the experiments, a MATLAB script was used to simulate the ILP formulation with randomly generated task graphs and evaluate its performance. Furthermore, we applied ILP task mapping to a real-world Model Predictive Control (MPC) application on DR1000C, a type of RISC-V MIMD processor with a vector accelerator. The maximum speedup of 10. 05x is obtained, which is promising for use in real-time embedded systems.