Criticality based Reliability from Rowhammer Attacks in Multi-User-Multi-FPGA Platform
Krishnendu Guha, Amlan Chakrabarti · 2022
The present era has witnessed spatial and temporal sharing of reconfigurable hardware or field programmable gate arrays (FPGAs) among multiple users. In such a scenario, the FPGA and related memory space is virtually partitioned and shared by many users. Criticality of tasks of different users is different and thus, their security strategies must vary. An adversary may pose as an user and cause rowhammer attacks, which is accessing its own memory rows in such a manner that will cause bit flips in nearby memory rows, accessed by a genuine user. Such attacks will go unnoticed as the adversary does not interfere with operations of others, but will cause erroneous result generation in task execution of genuine users. Existing works are silent on a mitigation policy for the present scenario. We explore how redundancy based approach may ensure security. However, this is associated with high area and power overhead, which indirectly increases cost. We propose a self aware approach that deploys self aware agents (SAA) to ensure criticality based reliability via a decentralized control mechanism in a multi FPGA platform. In the offline phase during testing, the number of memory access per unit time (MAPUT) that causes bit flips in nearby memory rows is noted and recorded in the SAAs. During runtime, the SAAs monitor the memory access made by user programs. On detecting MAPUT of user programs crossing the recorded MAPUT, it starts communicating with other SAAs and outsources the task for safe execution in another FPGA platform. To ensure prevention in future, it adopts certain policies like generating buffer memory rows or shuffling the memory locations of users or exchanging programs with other SAAs in advance. Nominal overhead of SAAs and large task success rate of high critical tasks during attacks from experimental results, depict prospects of our proposed mechanism.