Congestion aware low power on chip protocols with network on chip with cloud security
Suresh Ponnan, Tikkireddi Aditya Kumar, V.S. Hemakumar, Sakthieswaran Natarajan, Mohd Asif Shah · Journal of Cloud Computing Advances Systems and Applications · 2022
Abstract This article is to analyze the bottleneck problems of NoC in many more applications like multi-processor communication, computer architectures, and network interface processors. This paper aims to research the advantages and disadvantages of low congestion protocols on highway environments like multiple master multiple slave interconnections. A long-term evolution and effective on-chip connectivity solution for secured, congestion aware and low power architecture is emerged for Network-on-Chip (NoC) for MCSoC. Applications running simultaneously on a different chip are often exchanged dynamically on the chip network. Of-course, in general on chip communication, resources mean that applications may interact with shared resources to influence each other's time characteristics.