OEIC Architecture for a High Order Correlation Connectionist Network
Eric M. Hayes, P.J. Stanko, M.R. Azimi, Carl W. Wilmsen · Optics in Computing · 1997
The extraction of features of two or more consecutive scans from pictures is of great interest in today’s world. The technique of high order correlation to track dim targets has been developed at Colorado State University to accomplish this task.1 We have designed and had fabricated an optoelectronic chip (OEIC) though the MIT OPTOCHIP program as a first demonstration of this neural network. The chips have the ability to perform hard limit thresholding, store the outputs, and broadcast the outputs to the next stage. This paper will discuss the high order correlation neural network, and the optoelectronic chips designed as a demonstrator for the network.