HPC Workflow on Diverse XPU Architectures with oneAPI
Mandeep Kumar, Gagandeep Kaur · 2022 2nd International Conference on Intelligent Technologies (CONIT) · 2022
High Performance Computing (HPC) workloads necessitate a variety of hardware, including scalar, vector, matrix, and spatial architectures. The biggest challenge came from a programming standpoint, because writing and deploying code for the Central Processing Unit (CPU) and accelerators like Field Programmable Gate Array (FPGA) as well as Graphics Processing Unit (GPU) has traditionally necessitated a variety of languages, libraries, and tools. oneAPI, a unified programming model that addresses this issue and makes development easier across diverse XPU architectures, including CPUs, GPUs, and FPGAs. Data Parallel C++ (DPC++) is used to write oneAPI programs. It incorporates the SYCL standard for data parallelism and heterogeneous programming, as well as modern C++ productivity benefits and familiar constructs. It is a single-source programming language that allows host code and heterogeneous accelerator kernels to coexist in the same source files. This work presents an HPC workflow across diverse XPU architectures, including CPUs, GPUs, and FPGAs, using oneAPI. We glance at DPC++ and OpenMP with Message Passing Interface (MPI) on Multi-Node for CPU and GPU combinations. In addition, we examine oneAPI offload advisor and DPC++ GPU profiling.