Automated selection of build configuration based on machine learning

Reo Furuhata, Minglu Zhao, Keichi Takahashi, Yoichi Shimomura, Hiroyuki Takizawa · 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) · 2022

Nowadays, High-Performance Computing (HPC) application codes are becoming larger and more complex. There is an increasing demand for optimizing such codes to reduce execution time and hence achieve high performance. Compilers are used to translate the codes into executable programs. Many optimization techniques have already been incorporated into compilers, and the performance gain by each combination of optimization techniques strongly depends on the code. By selecting a compiler and its option flags, programmers can change the compilation process and its behaviors so that an HPC application can achieve high performance. However, it is not easy to express the selection of a compiler and its option flags as an explicit algorithm. So far, a compiler and its option flags have been selected in a trial-and-error fashion, which is labor-intensive, time-consuming, and potentially leading to in-appropriate selection. In addition, configuring the build process for more complex and heterogeneous HPC systems, in which different kinds of processors such as accelerators are employed, becomes even more challenging. Therefore, we propose an automatic compilation process configuration approach based on machine learning that uses dynamic information obtained by executing the code. A feature selection method is proposed to remove the irrelevant attributes for the machine learning model. A neural network is used to learn useful features from data to predict the appropriate build configuration for individual application codes. The evaluation results show that the proposed method outperforms other existing methods in the literature. The proposed feature selection helps the machine learning model characterize the application codes more accurately. Furthermore, it is demonstrated that the proposed approach can select the optimal configuration for each of different processors.

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