An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS
Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram Kumar Krishnamurthy · 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 2022
An 8-core 64b processor extends RISC-V to perform multiply accumulate within shared last level cache. Compute Near Last Level Cache (CNC) enables high-bandwidth access and local compute with the highest-capacity on-chip SRAM. The 1.15GHz chip expands virtual addressing, coherency, and consistency to CNC, enabling Linux-capable multi-core operation. CNC reduces energy by 52× for fully connected and 29× for convolutional DNN layers. MLPerf™ Anomaly Detection latency is reduced by 4.25× to 40μs.