DESIGN OF ADDER AND SUBTRACTOR HAVING LESS POWER DISSIPATION
Kartikeya Tiwari, K.B. Ramesh · International Journal of Engineering Applied Sciences and Technology · 2021
With the advancement in technology in the field of digital electronics, reversible logical has become a powerful tool in wide variety of areas like in designing of low power VLSI circuits, DNA computing, quantum computing and optical computing. Circuits made using reversible logic are more energy efficient and consumes less power. In these modern times we need designs of circuits that are speed efficient and should also consume less power. This paper emphasizes on presenting the improved reversible combinational circuit of eight – bit parallel adder and subtractor. These circuits are designed and implemented using Feynman, Double Feynman and MUX gates. Three designs of reversible eight – bit parallel adder and subtractor is proposed. Performance of all three designs is analyzed based number of reversible gates required, garbage input and output, quantum cost.