Implementation of RISC-V SoC from RTL to GDS flow using Open-Source Tools
S Nikhil Kumar Reddy · International Journal for Research in Applied Science and Engineering Technology · 2022
Abstract: The VSD QFLOW project is working on an open-source RTL-to-GDS tool that can produce a manufacturable layout from a hardware description in less than 24 hours and without involving a person. Opensource EDA tools are used to investigate and research an IC design for this purpose. This article explains how opensource EDA tools can assist researchers and students in learning. How to design and construct their own integrated circuits. Many hurdles and collaboration among different entities are involved in such an undertaking. We now have an open-source foundry. PDK as well as a thriving open-source hardware design environment. Th over all process can help in VLSI design. Optimizes error free GDS file for the given specification