Analysis of TG Based Content Addressable Memory Circuits
Gunampalli Manasa Lakshmi, Mohammed Salahuddin Mahmood, V. Kusuma, D. Khalandar Basha · 2022 International Conference on Applied Artificial Intelligence and Computing (ICAAIC) · 2022
Content Addressable Memory (CAM) gives address as the output by taking data as the input. Widely used for graphical optimization of the entire manufacturing procedure, Computer Networking Devices. It is also used in Digital image processing chips and Translation Look-aside Buffers (TLBs). The CAM can be considered as a black box that compares the input search data against a table of stored data and returns the address of the matching data. With the existing models the delay and power consumption are enormous with the 8*8 arrays arrangement. In this research work an attempt is made to design the 8*8 CAM array using the Transmission gate (TG) based CAM cell to lower power consumption effectively. The proposed TG based CAM array designed with 8*8 Static Random -Access Memory (SRAM) array, Decoder, Priority Encoder, TG CAM cell, Multiplexer and CAM array as basic blocks. The proposed method designed using the gdpk180 technology in Cadence Virtuoso tool and the functionality of the proposed design is examined by simulating the design using Cadence Spectre tool. The proposed system operated at 10.17ns Delay with average power consumption of 856.05uWatt. The results are compared with the few precedent methods.