NVIDIA MATHS: Mechanism to Access Test-Data over High-Speed Links
Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Kaushik Narayanun, Shantanu Sarangi, Francisco da Silva, Joe Sarmiento, Smbat A . Tonoyan, Ashwin Chintaluri, Animesh Khare, Milind Sonawane, Ashish Kumar, Anitha Kalva, Alex Hsu, Jayesh Pandey · 2022
MATHS (Mechanism to Access Test-Data over High-Speed Link) provides a high-throughput PCIe based system to structurally test system-on-chips (SOCs) at wafer and system-level. The system removes the need for expensive test equipment by eliminating the input/output pin (IO) requirements and memory per IO needs. It simplifies the ATE architecture and design to enable smaller form factors and reduce capital costs of ownership. MATHS enables eliminating the assembly test-insertion by directly testing the SOCs on system level platforms, further reducing the costs. Since the mechanism is based on PCIe standards, it is highly portable across all platforms including ATE, system-level test, board, and in-field testing.