Real-Time FPGA Implementation of Digital Video Watermarking Techniques using Co-Design Approach: Comparative Study
Noureddine Aissaoui, Redouane Kaibou, Mohamed Salah Azzaz · 2022
This paper presents a Genesys-2 FPGA implementation of three video watermarking techniques in both spatial and frequency domains followed by a comparative analysis. The video acquisition is realized using OV7670 camera used for real-time watermarking with each technique both in visible and invisible schemes with Video Graphics Adapter (VGA) display validations. The techniques implemented are based on Least Significant bit (LSB), additive spatial and additive frequency watermarking. All implementations have been realized in Software/Hardware (SW/HW) co-design using Vivado-HLS tool achieving low area, high speed of up to 130 MHz and low power consumption that did not exceed 827 mw all along with good watermarking performances of imperceptibility with fairly good robustness for most of the geometric and image processing attacks.