Review on Arbiter Physical Unclonable Function and its Implementation in FPGA for IoT Security Applications
Sk. Shariffuddin, N. M. Sivamangai, A. Napolean, R. Naveenkumar, S Kamalnath, G Saranya · 2022 6th International Conference on Devices, Circuits and Systems (ICDCS) · 2022
Security is one of the most difficult aspects of advancing the Internet of Things (IoT) in our daily lives and future industrial systems. IoT systems have a variety a slew of issues, including a scarcity of resources, reduced power usage, and the necessity to secure devices from cyber-attacks. Unfortunately, the approaches are limited by power consumption and a lack of computer capabilities; also, the typical usage of non-volatile memory to store secret keys is open to several assaults such as reverse engineering and side channeling. PUFs (Physical Unclonable Functions) are a type of method that is used to increase the security of physical devices and solve problems connected with existing cryptographic algorithms. PUFs are one-way lightweight functions that extort a distinct personality for each terminal based on unpredictable and impossible to reproduce physical variables imposed during production. Memory-based PUF’s (e.g., SRAM and SR-latch PUF’s), delay-based PUF’s (e.g., Arbiter PUF (APUF), digital PUF’s, operating frequency-based PUF’s (ring oscillator PUF (ROPUF)), and other PUF’s have been achieved in ASIC and, FPGA in particular. In this article, we examine a wide range of PUFs found in the literature. Many observations are based on the comparison of the surveyed schemes. The review concentrates on different types of arbiter PUF architectures and the quality of the designed arbiter PUFs in terms of three parameters: reliability, uniqueness and uniformity. This study examines the latest Arbiter PUF innovations and the necessary security requirements and promising security solutions for IoT applications.