Implementation of Viterbi Decoder Architecture Based on Code Rates
R. Lawanya, S. Nandhini, J Mercy, D. Saravanan · 2022 8th International Conference on Advanced Computing and Communication Systems (ICACCS) · 2022
In wireless technology, a most essential things to keep in mind about are the rate at which data can be sent and how well it can be corrected. The Viterbi decoder is used to make a network-on-chip based multicore architecture that is very energy efficient. The Viterbi decoder's mapping add-compare-select procedure was a big part of the energy efficiency. The Viterbi decoder reads a bit stream that has been encoded with convolution code. This is what the branch metric unit (BMU) does. It computes the distance among the received code word and the reference code word after the data has been encoded. An add-compare-select unit (ACSU) computes the branches and then selecting the most suitable trellis path based on those metrics. Finally, the SMU generates the decrypted bits using the trellis' optimal state sequence. So, if the message is incorrect, it will detect the error, rectify it, and send the revised code to the recipient. Data corruption in digital communication networks has been successfully addressed via error-correcting codes. It is commonly used in communication and processing of signal to produce reduced error transfer of data.