An effective power management scheme for RTL design based on multiple clocks
C.A. Papachristou, M. Spinning, M. Nourani · 2005
This paper presents an effective technique of low power design for RTL circuits and microarchitectures. The basis of this technique is: (a) to use a multiple clocking scheme of n non-overlapping clocks, by dividing the frequency f of a single clock into n cycles; (b) to partition the circuit into disjoint modules and assign each module to a distinct clock with frequency f/n. However, the overall effective frequency of the circuit remains f the single clock frequency. The results show that our multiple clocking scheme provides more effective power management (power savings up to 50%) at the RTL in comparison to conventional power management techniques based on gated clocks.