Reversible Division Circuit
Hafiz Md. Hasan Babu · 2020
The division circuit can be used in the arithmetic unit of a processor. Conventionally sequential circuits are used to implement the divider. This chapter presents a design of sequential division circuit using reversible logic. There are two approaches to perform division operation, namely, restoring division and nonrestoring division. In restoring approach, if subtraction result is negative, the partial remainder is restored to the correct value by performing the addition operation. In nonrestoring approach, if subtraction result is negative, the partial remainder is not restored immediately. The chapter describes reversible multiplexers, registers, parallel-in parallel-out (PIPO) left-shift registers, and parallel adder required to design reversible sequential division hardware. In PIPO shift register, all data bits are loaded into the register at once with the next clock pulse. After shift operation all data bits appear on the parallel outputs immediately. The chapter also discusses the reversible design of nonrestoring division circuit for positive integers.