Reversible Fault‐Tolerant Adder Circuits
Hafiz Md. Hasan Babu · 2020
This chapter presents a 4 × 4 parity-preserving logic gate named IG. It is parity preserving, that is, the parity of the inputs matches the parity of the outputs. The key concern of the reversible logic design is to minimize the number of garbage outputs. The fault-tolerant full-adder (FTFA) block can be used to realize other fault-tolerant arithmetic logic circuits in nanotechnology such as ripple carry adder, carry look-ahead adder, carry-skip logic and multiplier/divisor circuits. Reversibility recovers bit loss, but it is not capable of detecting bit error in circuits. Fault-tolerant reversible circuits are capable of preventing error at outputs. The chapter describes the design of reversible FTFA circuit, which is composed of new fault tolerant gate and Feynman double gates. It describes the designs of fault-tolerant carry skip adder, carry look-ahead adder and ripple carry adders.