HIGH SPEED AND LOW POWER MULTIPLIERS DESIGNED USING REVERSIBLE LOGIC METHODS
International Journal of Emerging Trends in Engineering Research · 2020
Multiplier circuits take an important role in developing various digital gadgets, digital signal processing (DSP) and many other tasks.Multipliers are the main building blocks in conducting operations like convolution, filtering, etc.The research focuses on the nature of high-speed multipliers, decreased power consumption, and a lower region of low complexity.Recently, reversible logic has seen widespread use in the architecture of multipliers, low-power CMOS circuits, optical data processing, quantum circuits, etc.This paper uses reversible logic to construct compact multipliers using Vedic mathematics, Baugh-Wooley and Wallace tree architectures.In specific, the suggested multiplier designs are based on logics such as the reversible Half Adder, the reversible Full Adder, the Dual Key Gate and the Kogge Stone Adder.In order to ensure improved performance, a thorough distinction is made between different multipliers based on reversible logic circuits.The results of the proposed design are simulated and synthesized using the Xilinx ISE method. .