A pipelined Kalman filter architecture
N.R. Shanbhag, K.K. Parhi · 2002
Presented in the paper is a hardware-efficient pipelined Kalman filter architecture for recursive least-squares (RLS) identification. The proposed architecture is developed via the relaxed look-ahead technique. This technique results in an extremely low hardware overhead at the expense of a slightly degraded performance. The hardware overhead due to pipelining consists of only the pipelining latches and is therefore negligible. Convergence analysis and simulations indicate that the adaptation accuracy of the pipelined and serial architectures are identical. Speed-up of up to 15 is demonstrated via simulations. Finally, a folded architecture for a pipelined Kalman filter is presented. This folded architecture reduces the number of computational elements by half while still achieving substantial speed-up.>