Online Testable Reversible Circuit Using NAND Blocks
Hafiz Md. Hasan Babu · 2020
This chapter introduces three reversible logic gates: R1 and R2 that can be used in pairs to design testable reversible logic circuits, and R3 that is used to construct two pair two rail checkers. The first gate R1 is used for realizing arbitrary functions while the second gate R2 is employed to integrate online testability features into the circuit. The testability feature is not incorporated in gate R3, as it will be used as the basic block for implementing the two-pair two-rail checkers. A two-pair two-rail checker is constructed using gate R3. The implementation of Boolean functions is done using testable NAND blocks. A sum-of-products (SOP) expression can be transferred into reversible logic by converting the SOP expression to NAND-NAND form. Each testable NAND block is realized by cascading the gates R1 and R2.