Design tips and experiences in using reconfigurable FLEX devices
Peter J. Covert · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1995
As field programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs) become faster, denser, and cheaper, many designers that previously used programmable logic devices (PLDs), and had a need in their next design for more functionality in a smaller footprint or board space, have switched to using these FPGAs or CPLDs to incorporate their design. With the advent of JTAG 1149.0 boundary test specification, there came a specified method for reprogramming the FPGAs and CPLDs live in the field. Using the electrical-erasable manufacturing process, reconfigurable hardware or logic was invented. It is perfect for prototyping as well as field applications where upgrades can be done live in a matter of seconds from personal computers that a new redesign has just been compiled. In this paper we discuss several issues experienced while using the EPX780 reconfigurable FPGA such as: 1) why the new design required a reconfigurable FPGA, 2) problems encountered in implementation including place and route, compiling, simulating, and testing, and 3) the future use of the reconfigurable hardware devices including selection of proper development systems. Overall, there will be several tips and design rules in using reconfigurable devices generally and FLEX 780s development specifically.