DSP Based Programmable FHD HEVC Decoder
Sangjo Lee, Joon‐Ho Song, Won‐Chang Lee, Doo-Hyun Kim, Jae‐Hyun Kim, Shihwa Lee · 2015
A programmable video decoding system with multi-core DSP and co-processors is presented. This system is adopted by Digital TV System on Chip (SoC) and is used for FHD High Efficiency Video Coding (HEVC) decoder under 400MHz. Using the DSP based programmable solution, we can reduce commercialization period by one year because we can parallelize algorithm development, software optimization and hardware design. In addition to the HEVC decoding, the proposed system can be used for other application such as other video decoding standard for multi-format decoder or video quality enhancement.