A 1.2 W single-chip MPEG2 MP@ML video encoder LSI including wide search range motion estimation and 81 MOPS controller
E. Ogura, M. Takashima, Daisuke Hiranaka, T. Ishikawa, Yukio Yanagita, S. Suzuki, Tokuya Fukuda, T. Ishii · 2002
Most conventional MPEG2 video encoder chip-sets use full-search block-matching algorithms (FSMBA) for motion estimation requiring large computation power and complex hardware. Thus, reducing the amount of motion-estimation hardware is key to designing a practical, cost-effective single-chip encoder. Two algorithms for adaptive motion estimation are implemented to achieve wide search area with less hardware than required by FSBMA. Using an efficient pipeline architecture and optimizing circuitry and data transfers with the external memory results in reduced external memory requirements and low power consumption.