Synthesis of Peres and R Logic Circuits in Nanoscopic Scale
Md. Abdullah-Al-Shafi · Communications on Applied Electronics · 2016
Traditional lithography based VLSI architecture expanded to optimize higher scale integration and low powered computing of semiconductor components.This tend encounter severe challenges of short channel issue, tunneling and variation of doping.Quantum Dot Cellular Automata (QCA) is an esteemed nano-scale technology and a better substitute of Complementary Metal Oxide Semiconductor (CMOS) for it's transformation technique and computation method.Information-lossless or reversible logic circuits has divers precise utilization in communications, digital signal processing (DSP), computer graphics also in quantum computation.This paper presents the systematic model of Peres gate (PG) and R gate in QCA and CMOS.To simulate and verify the proposed design QCADesigner and Microwindlite, widely used simulation tools are used.Those proposed design has a promising future and can be used in modeling complex computing structure and nano-scale based low power consumption information processing structure.