REMIC - design of a reactive embedded microprocessor core
Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza Biglari-Abhari · Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005. · 2005
Reactivity on external events is an important feature of almost all embedded systems. In this paper we present the design of a new, reactive embedded microprocessor called REMIC, that supports reactivity in a new way following the paradigm of synchronous system level language Esterel. The rationale for REMIC design, its novel features with the design details and some performance figures are presented to demonstrate its suitability for embedded systems. Besides single processor systems, REMIC can be easily combined into multiple processor architectures that support real concurrency.