[Panel] Many-core reality check - How increasing core counts, on-node networks, and deep integration will impact system interconnects
2016
Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. Node architectures have entered an era of intense innovation, with trends toward increasing numbers of devices per processor; integration of memory and the introduction of new memory technologies; and rapid increases in the scale of on-chip, on-package, and on-node networks. These trends, in turn, are influencing the design of network architectures and redefining the interaction between nodes and the network. In this session, our panelists will critically evaluate these trends to identify key issues that must be solved by the coming generations of high-speed networking technologies.