Behavioral Hardware Description Languages
Kluwer Academic Publishers eBooks · 2005
This chapter first presented the difference in approaching a synthesizable model compared to a behavioral model. Behavioral modelling requires a greater degree of discipline because of the greater freedom. Powerful encapsulation techniques allow a behavioral model to be structured to minimize maintenance. High-level data abstractions simplify the writing of a model by creating data types that are more natural to work with for a given transformation function. This chapter also described how VHDL and Verilog are unique from traditional programming languages and how they are simulated. The simulation process introduces some peculiarities that a good behavioral modeler must be aware of. Some of these peculiarities can make Verilog models non-portables and have been described in details.