Mapping Techniques
Donald G. Bailey · 2011
This chapter reviews a range of techniques for mapping from a software algorithm to a hardware implementation. These techniques may be considered as a set of design patterns that provides ways of overcoming common problems or constraints encountered in the mapping process. Timing constraints focus on the limited time available for performing the required operations. One technique for improving throughput is to use low level pipelining. Custom caching can significantly reduce the number of times that the data needs to be loaded into the field programmable gate array (FPGA). Memory bandwidth constraints result from the fact that only one memory access may be made per clock cycle. Any concurrent system with shared resources will face contention when a resource is used by multiple processes. If necessary, the FPGA can be dynamically reconfigured to switch from one task to another.