A fully-bypassed 6-issue integer datapath and register file on an Itanium microprocessor
E. Fetzer, J.T. Orton · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2003
A 6-issue integer datapath with a 20-ported 128/spl times/65 bit register file in a 0.18 /spl mu/m process operates up to 1.2 GHz at 1.5 V. Operands bypass through 4 stages, from 34 locations, using 1/2 clock for execution and 1/2 clock for bypass. Each result is available for the next instruction.