Low Power 32-bit Improved Carry Select Adder based on MTCMOS Technique
J. Syamuel John Ch. Mohammad Ari f · International Journal of Innovative Research in Science Engineering and Technology · 2015
The raise in requirement for mobile and electronic devices is causing the necessity of low power.This paper presents the design of Carry Select Adder using MTCMOS technique.A 32-bit CSA is designed.The target technology is Mentor Graphics tool.By utilizing this architecture, power is diminished.This paper shows better results for MTCMOS technique when compared to Improved Carry Select Adder using CMOS and Hybrid Pass Transistor Logic.The comparisons are made between the CMOS logic, Hybrid PTL and MTCMOS.This work is evaluated on the target technology 130-nm Pyxis Schematic Editor.