Designing gate arrays using a silicon compiler
John P. Gray, Irene Buchanan, Peter S. Robertson · 1982
This paper describes a programming environment in which gate array designs can be developed. It allows the engineer to design for performance, wirability and testability by manipulating a textual description of a design. The principle features of this are a high-level language for design description, completely automatic layout, and an integrated simulator. The total package can be referred to as a silicon compiler in the gate array design style.