Roofline model and Profiling of HPC benchmarks
Ik-Soo Eo, Woojong Han, Yoo-Mi Park · 2022
The computational performance of HPC highly depends on the balance between peak performance of processing elements and memory bandwidth. While the external memory is often the constraining factor in HPC, a relatively simple roofline model can provide insight on the bound and bottleneck of HPC performance. It may not provide the accurate performance numbers on a specific workload, however it will offer practical insights to both programmers and HW architects on the optimization points. We run the representative benchmark STREAM, HPCG and HPL on ARM and X86 nodetserver), We compare the peak performance and memory bandwidth published by the vendor with profile data gathered with STREAM, HPCG and HPL to prove validity of the simple roofline model. The HPCG and HPL benchmark result shows that HPCG is memory bound while the HPL benchmark is compute bound. The roofline model also shows the balance point of each architecture between memory bandwidth and peak computational performance.