A Path Toward Understanding the Performance Capabilities of SmartNIC Devices [Slides]
Michael Beebe, Brody Williams, John D. Leidel, Yong Chen, Stephen Poole · 2022
SmartNICs, accelerator devices integrated with a network, have conventionally been utilized to offload low-level networking functionality. However, newer SmartNIC variants, which incorporate a system-on-chip (SoC) with traditional designs, are challenging this precedent. Leveraging significantly augmented resources, these new devices offer increased versatility and the potential to more effectively complement a given architecture’s CPU. Naturally, there is performance overhead associated with offloading tasks from a host CPU to a SmartNIC. As SmartNICs become more versatile and are used for a wider range of computational tasks, it is critical to understand how well the SmartNICs perform those respective tasks in order to determine whether the cost of offloading is worthwhile. In this work, we lay out a path to understand the important question of when and when not to offload to SmartNIC devices by way of a series of microbenchmarks.